Secure Dynamic Reconfiguration of FPGAs

MSc Thesis, MEIC-A, IST Lisbon
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This work was performed from September 2013 to July 2014, for MSc thesis in Information Systems and Computer Engineering, at Instituto Superior Tecnico, Lisbon, Portugal. The thesis work is supervised by Prof. Ricardo Chaves, INESC-ID/IST Lisbon. My master's mobility study at IST Lisbon was supported by Erasmus Mundus Heritage Fellowship.

Contact us:
Hirak Kashyap
kashyap@sips.inesc-id.pt

Ricardo Chaves
ricardo.chaves@inesc-id.pt

inesc-id

INESC-ID, IST
Universidade de Lisboa
Rua Alves Redol 9, 1000-029 Lisbon, Portugal
© Hirak Kashyap and Ricardo Chaves