Ricardo Chaves' publications

Ricardo Chaves' publications

My publication at Google Scholar, at DBLP, at ORCID, and at ResearcherID.

Edited Books

2017: Nicolas Sklavos, Ricardo Chaves, Giorgio Di Natale and Francesco Regazzoni. Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, Springer, January 2017.

Books

2010: Ricardo Chaves. Secure Computing on Reconfigurable Systems: Improving Performance and Reliability of Dynamic Reconfigurable Systems, LAP LAMBERT Academic Publishin, June 2010.

Book Chapters

2017: Joo Carlos Cabrita Resende and Ricardo Chaves. Hardware Security and Trust, chapter AES Datapaths on FPGAs: A State of the Art Analysis, Springer International Publish, January 2017.
2016: Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. Embedded Systems Design with Special Arithmetic and Number Systems, chapter RNS-based Embedded Processor Design, Springer, October 2016.; Ricardo Chaves, Leonel Sousa, Nicolas Sklavos, Apostolos P. Fournaris, Georgina Kalogeridou, Paris Kitsos and Farhana Sheikh. Circuits and Systems for Security and Privacy, chapter Secure Hashing: SHA-1, SHA-2, and SHA-3, CRC Press, February 2016.
2012: Ricardo Chaves. Embedded Systems Design with FPGAs, chapter Compact Clefia Implementation on FPGAs, Springer, September 2012.; Samuel Freitas Anto, Ricardo Chaves and Leonel Sousa. Embedded systems: Hardware Design and Implementations, chapter Reconfigurable Architecture for Cryptography over Binary Finite Fields, John Wiley & Sons, May 2012.

International Journals

2017: Ibrahim Tariq Javed, Rebecca Copeland, Noel Crespi, Marc Emmelmann, Ancuta Corici, Ahmed Bouabdallah, Tuo Zhang, Saad El Jaouhari, Felix Beierle, Sebastian Gndr, Axel Kpper, Kevin Corre, Jean-Michel Crom, Frank OberleIngo Friese, Ana Caldeira, Gil Dias, Nuno Santos, Ricardo Chaves and Ricardo Lopes Pereira. Cross-domain identity and discovery framework for web calling services, Annals of Telecommunications, Springer Paris, June 2017.
2016: Hirak Jyoti Kashyap and Ricardo Chaves. Compact and On-the-fly Secure Dynamic Reconfiguration for Volatile FPGAs, ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 9, n. 11, February 2016.; Hector Pettenghi, Ricardo Chaves, Roberto de Matos and Leonel Sousa. Method for Designing two levels RNS Reverse Converters for large Dynamic Ranges, Integration, the VLSI Journal, February 2016.
2015: Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. Arithmetic-based binary-to-RNS converter modulo {2^n±k} for jn-bit Dynamic Range, IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, vol. 23, n. 3, pp. 603-607, March 2015.; Nuno Neves, Henrique Miguel Santos da Silva Mendes, Ricardo Chaves, Pedro Toms and Nuno Roma. Morphable Hundred-Core Heterogeneous Architecture for Energy-Aware Computation, IET Computers & Digital Techniques, The Institution of Engineering and Technology (IET), vol. 9, n. 1, pp. 49-62, January 2015.
2014: Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. An Efficient Scalable RNS Architecture For Large Dynamic Ranges, Journal of Signal Processing Systems, Springer, vol. 77, n. 1, pp. 191-205, October 2014.
2013: Hector Pettenghi, Ricardo Chaves and Leonel Sousa. Method to Design General RNS Reverse Converters for Extended Moduli Sets, IEEE Transactions on Circuits and Systems II, n. 12, pp. 877-881, December 2013.; Leonel Sousa, Samuel Freitas Anto and Ricardo Chaves. On the Design of RNS Reverse Converters for the Four-Moduli Set {2^n+1, 2^n-1, 2^n, 2^{n+1}+1}, IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, vol. 21, n. 10, pp. 1945-1949, October 2013.; Hector Pettenghi, Ricardo Chaves and Leonel Sousa. RNS Reverse Converters for Moduli Sets with Dynamic Ranges up to (8n+1)-bit, IEEE Transactions on Circuits and Systems I, IEEE Circuits and Systems Society, vol. 60, n. 6, pp. 1487-1500, June 2013.
2008: Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa and Stamatis Vassiliadis. Cost-Efficient SHA Hardware Accelerators, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), IEEE, vol. 16, n. 8, pp. 999-1008, August 2008.
2007: Ricardo Chaves and Leonel Sousa. Improving RNS multiplication with more balanced moduli sets and enhanced modular arithmetic structures, Journal Computers & Digital Techniques, Institution of Engineering and Technology (IET), vol. 1, n. 5, pp. 472-480, September 2007.
2005: Leonel Sousa and Ricardo Chaves. A Universal Architecture for Designing Efficient Modulo 2^n+1 Multipliers, IEEE Transactions on Circuits and Systems-I: Regular Papers, IEEE, vol. 52, n. 6, pp. 1166- 1178, June 2005.
2003: Ana Paiva, Marco Costa, Ricardo Chaves, Moises Simes Piedade, Drio Mouro, Daniel Vieira Moro e Silva Sobral, Kristina Hook, Gerd Andersson and Adrian Bullock. SenToy: an Affective Sympathetic Interface, International Journal of Human-Computer Studies, Elsevier Science Ltd., vol. 59, n. 1, pp. 227-235, July 2003.

International Conferences

2018: Ricardo Chaves, Lukasz Chmielewski, Francesco Regazzoni and Lejla Batina. SCA-Resistance for AES: How Cheap Can We Go?, In International Conference on Cryptology in Africa, May 2018.
2017: Diogo Parrinha and Ricardo Chaves. Flexible and low-cost HSM based on non-volatile FPGAs, In IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig), December 2017.; Pedro Maat C. Massolino, Lejla Batina, Ricardo Chaves and Nele Mentens. Area-optimized montgomery multiplication on IGLOO 2 FPGAs, In 27th International Conference on In Field Programmable Logic and Applications (FPL), September 2017.; Paulo Chainho, Steffen Drsedow, Ricardo Lopes Pereira, Ricardo Chaves, Nuno Santos, Kay Haensge and Anton Roman Portabales. Decentralized communications: Trustworthy interoperability in peer-to-peer networks, In 2017 European Conference on In Networks and Communications (EuCNC), June 2017.; Magnus Sundal and Ricardo Chaves. Efficient FPGA Implementation of the SHA-3 Hash Function, In IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), June 2017.; Paulo Chainho, Anastasius Gavras, Steffen Druesedow, Ricardo Lopes Pereira, Ricardo Chaves, Nuno Santos and Bernardo Marques Graa. reTHINK Core Framework, a New Way for Establishing Communication Channels Between Endpoints, In European Conference on Networks and Communications (EuCNC), June 2017.; Magnus Sundal and Ricardo Chaves. Improving FPGA based SHA-3 structures, In Hardware Oriented Security and Trust (HOST), May 2017.
2016: Juvenal Andr Olim Arajo, Pedro Miguel Florindo Miguens Matutino and Ricardo Chaves. Residue Number System Hardware Emulator and Instructions Generator, In 6th Conference on Trustworthy Manufacturing and Utilization of Secure Devices, Barcelona, November 2016.; Sancha Pereira, Andr Alves, Nuno Santos and Ricardo Chaves. Storekeeper: A Security Enhanced Cloud Storage Aggregation Service, In IEEE 35th Symposium on Reliable Distributed Systems (SRDS), Budapest, Hungary, September 2016.; Ibrahim Tariq Javed, Rebecca Copeland, Noel Crespi, Felix Beierle, Sebastian Gndr, Axel Kpper, Marc Emmelmann, Ancuta Corici, Kevin Corre, Jean-Michel Crom, Ahmed Bouabdallah, Frank Oberle, Ingo Friese, Ana Caldeira, Gil Dias, Ricardo Chaves and Nuno Santos. Global Identity and Reachability Framework for Interoperable P2P Communication Services, In 19th International ICIN Conference - Innovations in Clouds, Internet and Networks, March 2016.
2015: Joo Carlos Cabrita Resende and Ricardo Chaves. Compact Dual Block AES core on FPGA for CCM Protocol, In In International Conference on Field Programmable Logic and Applications (FPL), pp. 228-235, London, UK, September 2015.; Joo Carlos Nunes Bittencourt, Joo Carlos Cabrita Resende, Wagner Luiz de Oliveira and Ricardo Chaves. CLEFIA Implementation with Full Key Expansion, In Euromicro Conference on Digital System Design (DSD), pp. 555-558, Madeira, Portugal, August 2015.; Ricardo Chaves, Giorgio Di Natale, Lejla Batina, Shivam Bhasin, Baris Ege, Apostolos Fournaris, Nele Mentens, Stjepan Picek, Francesco Regazzoni, Vladimir Rozick, Nicolas Sklavos and Bohan Yang. Challenges in Designing Trustworthy Cryptographic Co-Processors, In International Symposium on Circuits and Systems (ISCAS), pp. 2009-2012, May 2015.; Nicolas Sklavos, Joo Carlos Cabrita Resende, Ricardo Chaves, Francesco Regazzoni and Osnat Keren. Efficiency of Cryptography for Multi - Algorithm Computation on Dedicated Structures, In 4th International Conference on Modern Circuits and Systems Technologies (MOCAST'15), May 2015.; Joo Carlos Cabrita Resende and Ricardo Chaves. Dual CLEFIA/AES Cipher Core on FPGA, In Applied Reconfigurable Computing (ARC), pp. 229–240, January 2015.
2014: Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. ROM-less RNS-to-binary converter moduli {22𝑛 −1,22𝑛 +1,2𝑛 −3,2𝑛 +3}, In International Symposium on Integrated Circuits (ISIC), pp. 432-435, December 2014.; Joo Nuno Pires Amaral, Francesco Regazzoni, Pedro Toms and Ricardo Chaves. Accelerating Differential Power Analysis on Heterogeneous Systems, In 9th Workshop on Embedded Systems Security (WESS 2014), New Delhi, India, October 2014.; Hirak Jyoti Kashyap and Ricardo Chaves. Secure partial dynamic reconfiguration with unsecured external memory, In International Conference on Field Programmable Logic and Applications (FPL), Munich, Germany, September 2014.; Hector Pettenghi, Ricardo Chaves, Leonel Sousa and Jude Angelo Ambrose. Method for designing Multi-Channel RNS Architectures to prevent Power Analysis SCAs, In International Symposium on Circuits and Systems (ISCAS), May 2014.
2013: Hector Pettenghi, Ricardo Chaves and Leonel Sousa. Method for designing modulo $\{2^{n} \pm k\}$ Binary-to-RNS converters, In The Conference on Design of Circuits and Integrated Systems (DCIS), November 2013.; Srgio Micael Ferreira Paigua, Frederico Pratas, Pedro Toms, Nuno Roma and Ricardo Chaves. HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels, In 25th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'2013), pp. 17-24, Porto Galinhas, Brazil, October 2013.; Jos Leito, Jos Germano, Nuno Roma, Ricardo Chaves and Pedro Toms. Scalable and High Throughput Biosensing Platform, In 23rd International Conference on Field Programmable Logic and Applications (FPL 2013), Porto, Portugal, September 2013.; Joo Colao, Adrian Matoga, Aleksandar Ilic, Nuno Roma, Pedro Toms and Ricardo Chaves. Transparent application acceleration by intelligent scheduling of shared library calls on heterogeneous systems, In International Conference on Parallel Processing and Applied Mathematics (PPAM 2013), Springer, vol. 8384, pp. 693-703, Warsaw - Poland, September 2013.; Adrian Matoga, Ricardo Chaves, Pedro Toms and Nuno Roma. A Flexible Shared Library Profiler for Early Estimation of Performance Gains in Heterogeneous Systems, In International Conference on High Performance Computing & Simulation (HPCS 2013), pp. 461-470, Helsinki - Finland, July 2013.; Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. A Compact and scalable RNS Architecture, In In 24th IEEE International Conference on Application-specific Systems, Architectures and Processors - ASAP 2013, Washington D.C., USA, April 2013.
2012: Adrian Matoga, Ricardo Chaves, Pedro Toms and Nuno Roma. An FPGA based Accelerator for Encrypted File Systems, In 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), HiPEAC, Fiuggi - Italy, July 2012.; Pedro Miguel Florindo Miguens Matutino, Hector Pettenghi, Ricardo Chaves and Leonel Sousa. RNS Arithmetic units for modulo {2n+-k}, In 15th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools - DSD2012, IEEE Computer Society Press, Cesme - Izmir – Turkey, July 2012.
2011: Pedro Miguel Florindo Miguens Matutino, Hector Pettenghi, Ricardo Chaves and Leonel Sousa. Multiplier-based binary-to-RNS converter modulo {2n+-k}, In 26th Conference on Design of Circuits and Integrated Systems - DCIS2011, Portugal, November 2011.; Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. Binary-to-RNS conversion units for moduli 2^n+/- 3, In 14th EUROMICRO Conference on Digital System Design (DSD), IEEE, pp. 460-467, Finland, September 2011.; Paulo Proena and Ricardo Chaves. Compact CLEFIA Implementation on FPGAS, In International Conference on Field Programmable Logic and Applications (FPL), IEEE, pp. 512--517, September 2011.
2010: Hector Pettenghi, Ricardo Chaves, Leonel Sousa and Mara Jose Avedillo. An improved RNS generator 2^n+-k based on threshold logic, In Proccedings of 18th IEEE/IFIP Intenational Conference on VLSI and System-on-Chip (VLSI-soc), June 2010.; Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves and Leonel Sousa. Arithmetic units for RNS moduli {2^{n}-3} and {2^{n}+3}, In 13th Euromicro Conference On Digital System Design (DSD), April 2010.; Kazeem Gbolagade, Ricardo Chaves, Leonel Sousa and Sorin Cotofana. An Improved Reverse Converter for the {2^{2n+1}-1, 2^{n}, 2^{n}-1} Moduli Set, In IEEE International Symposium on Circuits and Systems (ISCAS 2010), January 2010.
2009: Samuel Freitas Anto, Ricardo Chaves and Leonel Sousa. AES and ECC Cryptography Processor with Runtime Configuration, In Seventeenth International Conference on Advanced Computing and Comunications, IEEE, Bangalore, India, December 2009.; Kazeem Glolagade, Ricardo Chaves, Sorin Cotofana and Leonel Sousa. Residue-to-Binary Converter for the Moduli Set {2^{2n+1},2^{2n},2^{n}-1}, In 2nd International Conference on Adaptive Science & Technology, IEEE, September 2009.; Samuel Freitas Anto, Ricardo Chaves and Leonel Sousa. Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices, In The 17th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, March 2009.
2008: Samuel Freitas Anto, Ricardo Chaves and Leonel Sousa. FPGA Elliptic Curve Cryptographic Processor over GF(2^m), In International Conference on Field-Programmable Technology (ICFPT 08), IEEE, September 2008.; Muiquel Perics, Ricardo Chaves, Georgi Gaydadjiev, Stamatis Vassiliadis and Mateo Valero. Vectorized AES core for high-throughput secure environments, In proceedings of 8th International Meeting High Performance Computing for Computational Science (VECPAR 08), June 2008.; Ricardo Chaves, Georgi Kuzmanov and Leonel Sousa. On-The-Fly Attestation of Reconfigurable Hardware, In International Conference on Field Programmable Logic and Applications (FPL 08), IEEE, May 2008.; Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa and Stamatis Vassiliadis. Merged Computation for Whirlpool Hashing, In Design, Automation and Test in Europe (DATE 08), pp. 1-4, Munich, Germany, March 2008.; Ricardo Chaves, Blagomir Donchev, Georgi Kuzmanov, Leonel Sousa and Stamatis Vassiliadis. BRAM-LUT tradeoff on a Polymorphic DES Design, In International Conference on High Performance Embedded Architectures & Compilers (HiPEAC 2008), Lecture Notes in Computer Science, vol. 4917, pp. 55-65, January 2008.
2006: Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa and Stamatis Vassiliadis. Improving SHA-2 Hardware Implementations, In Workshop on Cryptographic Hardware and Embedded Systems (CHES), Springer, pp. 298-310, Yokohama, Japan, October 2006.; Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa and Stamatis Vassiliadis. Rescheduling for Optimized SHA-1 Calculation, In SAMOS Workshop on Computer Systems Architectures Modelling and Simulation, Spinger, pp. 425-434, June 2006.; Ricardo Chaves, Georgi Kuzmanov, Stamatis Vassiliadis and Leonel Sousa. Reconfigurable Memory Based AES Co-Processor, In International Parallel & Distributed Processing Symposium, 13th Reconfigurable Architectures Workshop, IEEE Computer, pp. 192-, Rhodes Island, Greece, April 2006.
2005: Ricardo Chaves and Leonel Sousa. Faster Modulo 2^n + 1 Multipliers without Booth Recoding, In XX Conference on Design of Circuits and Integrated Systems (DCIS), Lisboa, Portugal, November 2005.
2004: Ricardo Chaves and Leonel Sousa. {2^n+1,2^(n+k),2^n-1}:A New RNS Moduli Set Extention, In IEEE Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, IEEE Computer Society, pp. 210-217, Rennes, France, September 2004.
2003: Ricardo Chaves and Leonel Sousa. RDSP: A RISC DSP based on Residue Number System, In IEEE Euromicro Symposium on Digital System Design: Architectures, Methods, pp. 128-135, September 2003.; Ana Paiva, Ricardo Chaves, Moises Simes Piedade, Adrian Bullock, Gerd Andersson and Kristina Hk:. SenToy: a tangible interface to control the emotions of a synthetic character, In The Second International Joint Conference on Autonomous Agents Multiagent Systems, AAMAS 2003, ACM Press, pp. 1088-1089, Melbourne, Australia, July 2003.; Ana Paiva, Marco Vala, Ricardo Chaves and Rui Prada. FantasyA and SenToy (short paper), In CHI-2003, ACM Press, January 2003.

National Conferences

2016: Diogo Kpke Mimoso Rodrigues Prata, Ricardo Chaves and Aleksandar Ilic. Secure External Memory on Embedded Devices, In XII Jornadas sobre Sistemas Reconfiguráveis (REC), Universidade de Trás-os-Montes e Alto Douro, Portu, June 2016.
2015: Rui Diogo de Sousa Morais, Ricardo Chaves and Joo Barreto. Secure Tracking: Mobile Tracking for Children and Mentally Ill Patients, In Inforum 2015, September 2015.
2013: Nuno Miguel Grilo Fonseca Pinheiro, Ricardo Chaves and Carlos Nuno da Cruz Ribeiro. Secure Password Management With Smart Cards, In Inforum, Inforum, September 2013.; Adrian Matoga, Ricardo Chaves, Pedro Toms and Nuno Roma. Accelerating user-space applications with FPGA cores: profiling and evaluation of the PCIe interface, In IX Jornadas sobre Sistemas Reconfiguráveis - REC2013, University of Coimbra, pp. 33-40, Coimbra - Portugal, February 2013.; Srgio Micael Ferreira Paigua, Adrian Matoga, Ricardo Chaves, Pedro Toms and Nuno Roma. Evaluation and integration of a DCT core with a PCI Express Interface using an Avalon interconnection, In IX Jornadas sobre Sistemas Reconfiguráveis - REC2013, University of Coimbra, pp. 93-99, Coimbra - Portugal, February 2013.
2012: Pedro Miguel Florindo Miguens Matutino, Ricardo Chaves, Horcio C. Neto and Leonel Sousa. Decimal multiplication on FPGA based on a RNS system representation, In VIII Jornadas sobre Sistemas Reconfiguráveis - REC2012, Lisbon, Portugal, February 2012.
2011: Filipe Alexandre Ricardo Marques, Ricardo Chaves and Carlos Lima. Smart Cards: Remote Authentication using Biometrics, In INFORUM 2011 - Simpósio de Informática, pp. 758-769, September 2011.; Pedro Miguel Florindo Miguens Matutino, Horcio C. Neto, Leonel Sousa and Ricardo Chaves. Are Residue Number Systems worthwhile on FPGAs?, In VII Jornadas sobre Sistemas Reconfiguráveis, pp. 133-136, Porto, February 2011.
2007: Kees van der Bok, Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa and Arjan van Genderen. Dynamic FPGA Reconfigurations with Run-Time Region Delimitation, In Workshop on Circuits, Systems and Signal Processing (ProRISC), pp. 201-207, Veldhoven, The Netherlands, November 2007.
2006: Y. D. Yankova, Abel David Azevedo Martins da Silva, S. Vassiliadis, G.K. Kuzmanov and Ricardo Chaves. HLL-to-HDL Generation: Results and Challenges, In Workshop on Circuits, Systems and Signal Processing (ProRisc), The Netherlands, November 2006.; Ricardo Chaves, G.K. Kuzmanov, S. Vassiliadis and Leonel Sousa. Reconfigurable Cryptographic Processor, In Workshop on Circuits, Systems and Signal Processing (ProRisc), The Netherlands, November 2006.
2005: Ricardo Chaves, George Kuzmanov, Stamatis Vassiliadis and Leonel Sousa. Polymorphic AES Encryption Implementation, In Workshop on Circuits, Systems and Signal Processing (ProRisc), Netherlands, November 2005.

Theses

2007: Ricardo Chaves. Secure Computing on Reconfigurable Systems, PhD Thesis, Delft University of Technology/Instituto Superior Técnico, UTL, Lisbon, Portugal, December 2007.
2003: Ricardo Chaves. RDSP: Processador Digital de Sinal com Suporte para Aritmética por Resíduos, MSc Thesis, Instituto Superior Técnico, Lisboa, May 2003.
2001: Ricardo Chaves. Processamento de sinal e criptografia baseados em Sistemas de Numeração por Resíduos, Graduation Thesis, IST, to appear in 2001.

Technical Reports

2013: Srgio Micael Ferreira Paigua, Frederico Pratas, Pedro Toms, Nuno Roma and Ricardo Chaves. Accelerator Interconnection Framework: efficient generation of streaming patterns, July 2013.
2012: Hector Pettenghi, Ricardo Chaves and Leonel Sousa. Multiplicative Inverses Validations for Moduli Sets with Dynamic Ranges of (5n+beta)-bit, May 2012.
2008: Samuel Freitas Anto, Ricardo Chaves and Leonel Sousa. Elliptic Curve Cryptographic Processor over GF(2^m) with Coordinate Collapsing, September 2008.
2006: K.L.M. Bertels, S. Vassiliadis, E. Moscu Panainte, Y. D. Yankova, CG Galuzzi, Ricardo Chaves and G.K. Kuzmanov. Developing applications for polymorphic processors: the Delft Workbench, January 2006.
2003: Ricardo Chaves and Leonel Sousa. Improvement of a 2^n+1 Modulo Multiplier, January 2003.
2002: Ana Paiva and Ricardo Chaves. Supporting Affective Interactions for Real-time Applications, to appear in 2002.; Ana Paiva and Ricardo Chaves. Supporting Affective Interactions for Real-time Applications”, Deliverable D7.3, to appear in 2002.

Advising of Theses

(ongoing): Ricardo Miguel da Silva Santos. Breaking crypto systems using side-channel attacks, MSc Thesis (in progress).; Joo Carlos Santos Fernandes. Choosing the Future of Lightweight Encryption Algorithm, MSc Thesis (in progress).; Afonso Maria Viegas Bota Carreira Caetano. Deissertação : SmartZone: enhancing the security of TrustZone with SmartCards, MSc Thesis (in progress).; Erica Tena Snchez. Faul injection/SCA attacks and countermeasurements, PhD Thesis (in progress).; Francisco Eugenio Potestad Ordoez. Faul injection/SCA attacks and countermeasurements, PhD Thesis (in progress).; Pedro Campelo Alves Teixeira. Haking the sistems from within, MSc Thesis (in progress).; Joo Carlos Cabrita Resende. Lightweight Cryptography and its impact on the security of embedded devices, PhD Thesis, Tecnico, Universidade Lisboa (in progress).; Andr Filipe Marques Mendes. LTLS Lightweight LTLS for the new IoT world, MSc Thesis (in progress).; Wagner Thadeu Moreira Gomes. Secure Communication over mobile phone using smartcards, MSc Thesis (in progress).; Ricardo Manuel Teixeira Pires. SecureFSeSD: Secure FileSystem on an Embedded SD, MSc Thesis (in progress).; Illya Gerasymchuk. TLS for IOT, MSc Thesis (in progress).; Rui Miguel Alexandrino Tom. User Friendly SCA Tool, MSc Thesis (in progress).
2017: Bernardo Marques Graa. Aplicações webRTC com recurso à plataforma reThink, MSc Thesis, IST, November 2017.; Pedro Dias do Vale. Assinaturas Digitais Qualificadas Remotas, MSc Thesis, November 2017.; Filipe Duarte Bento Custdio. Crypto Cloud, MSc Thesis, November 2017.; Bernardo Marques Graa. Bolsa BIC - Projecto RETHINK, MSc Thesis, October 2017.; Ricardo Jorge do Rosrio Mas. Evaluating the Security of Cryptographic and wireless systems against electromagnetic attacks, MSc Thesis, October 2017.; Diogo Kpke Mimoso Rodrigues Prata. Secure External Memory on Embedded Devices, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, October 2017.; Diogo Alcoforado da Gama de Oliveira Parrinha. Tamper proof certification system based on secure non-volatile FPGAs, MSc Thesis, October 2017.; Joo Fernando Coelho Lopes. Smart Card Power Analysis: From Theory To Practice, MSc Thesis, May 2017.
2016: Magnus Sundal. ASIC/FPGA implementation of SHA-3, MSc Thesis, November 2016.; Andr Pimenta Alves. Multi-OS on the Cloud, MSc Thesis, November 2016.; Ana Sofia Lameira Caldeira. Runtime Support fo Hiperty Execution in a Web-Centric P2P Service Architecture, MSc Thesis, November 2016.; Gil Alexandre Marques Dias. Secure hyper-linked entities in dynamic networks, MSc Thesis, November 2016.; Sancha Pereira. Storekeeper: Building a Secure File Sharing Platform Out of Freely Available Cloud Storage, MSc Thesis, Instituto Superior Técnico, October 2016.; Jos Duarte Gomes Pires Loureno. Improved Memory Swapping Using Grafics Processing Units, MSc Thesis, May 2016.
2015: Nuno Andr Mendes Pissarra. Cryptographic Functions on the SideWorks architecture, MSc Thesis, November 2015.; Guilherme Loreno Santos Vale. Raspberry Drone: Unmanned Aerial Vehicle (UAV), MSc Thesis, July 2015.; Pedro Miguel Florindo Miguens Matutino. Residue Number Systems - Efficient Architectures and Circuits, PhD Thesis, July 2015.; Rui Diogo de Sousa Morais. Secure Tracking: Traking por GPS de crianças e pessoas com doenças mentais, MSc Thesis, June 2015.; Carlos Domingos Vaz Lampreia Horta Martins. Parallelization of the LU Decomposition on Heterogeneous Systems, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, May 2015.; Juvenal Andr Olim Arajo. Eliptic Curve Cryptography Hardware Core Supported by RNS, MSc Thesis, April 2015.
2014: Bernardo de Matos Patrocnio dos Santos. Autonomous system for track athletics guidance for the visual impaired, MSc Thesis, November 2014.; Joo Carlos Cabrita Resende. Flexible and Compact multi Algorithm Encryption Engine, MSc Thesis, November 2014.; Joo Nuno Pires Amaral. Improving DPA analysis with distributed computing using OpenCL, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, Lisboa, Portugal, November 2014.; Henrique Miguel Santos da Silva Mendes. Swinger: Processor Re-Allocation on Dynamically Reconfigurable FPGAs, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, November 2014.; Joo Duarte Gomes. Safe_VANET, MSc Thesis, IS, June 2014.; Hirak Jyoti Kashyap. Secure Partial Reconfiguration of FPGA, MSc Thesis, June 2014.; Pedro Manuel Vieira Gomes. Ubiquious Geo-Location in Wireless Networks, MSc Thesis, June 2014.; Joo Pedro Passos Figueiras. Formula Student Championship: an Integrated Data Processing Module Adapted for Pit-Stop Scenarios, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, Lisboa, May 2014.
2013: Gustavo Isaac da Costa Maia. Grafical user interface for biomedical applications, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, November 2013.; Carlos Filipe Correia Sequeira de Jesus Simes. Guidance System for Visually Impared Athetes, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, November 2013.; Jos Leito. High throughput biosensing platform, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, Lisboa, November 2013.; Srgio Micael Ferreira Paigua. HotStream: Heterogeneous Many-Core Data Streaming Framework with Complex Pattern Support, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, November 2013.; Nuno Miguel Grilo Fonseca Pinheiro. Secure password management using smart cards, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, November 2013.; Joo Filipe Duarte Colao. Virtualization of Shared Library Calls for Multi-platform Computation, MSc Thesis, Instituto Superior Técnico, Universidade de Lisboa, November 2013.; Micas Camela Manuel Rafael. Uso da Virtualização nos Servidores do ISUTC como Melhoria na Gestão dos Serviços de Rede, MSc Thesis, Instituto Superior de Transportes e Comunicação, Maputo, Moçambique, January 2013.
2012: Ricardo Manuel Rodrigo Antunes. Integração de uma infra-estrutura de Network Access Control na Rede de Dados da Força Aérea, MSc Thesis, Academia da Força Aérea, December 2012.
2011: Filipe Alexandre Ricardo Marques. Autenticação Biométrica com o Cartão do Cidadão, MSc Thesis, September 2011.
2010: Paulo Alexandre Gamboa Nunes Proena. Núcleos de Cifragem na Arquitectura SideWorks, MSc Thesis, November 2010.; Nuno Filipe Vasconcelos Captivo Gonalves. Controlador de Pistola Paint ball, MSc Thesis, October 2010.

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